WeiBing

U-Boot 1.3.4 (Apr  9 2011 - 11:09:46) for SMDKV210

 

I2C:   ready

SET CONFIG_CLK_1000

 

CPU:  S5PV210@1000MHz(OK)

        APLL = 1000MHz, HclkMsys = 200MHz, PclkMsys = 100MHz

        MPLL = 667MHz, EPLL = 80MHz

                       HclkDsys = 166MHz, PclkDsys = 83MHz

                       HclkPsys = 133MHz, PclkPsys = 66MHz

                       SCLKA2M  = 200MHz

Serial = CLKUART 

Board:   SMDKV210

RAM Configuration:

Bank #0: 30000000 256 MB

Bank #1: 40000000 256 MB

Flash:   8 MB

start:c3e9c000,end:c3f80000,brk:c3e9c000

SD/MMC:  Card init fail!

0 MB

NAND:    ***:512,536870912

pagemask:3ffff,shfit:b

chip_shfit:1d

NAND device: Manufacturer ID: 0xec, Chip ID: 0xdc (Samsung NAND 512MiB 3,3V 8-bit)

chips:1,size:20000000,chipsize:536870912

512 MB 

*** Warning - using default environment

 

In:      serial

Out:     serial

Err:     serial

checking mode for fastboot ...

Hit any key to stop autoboot:  0 

 

NAND read: device 0 offset 0x600000, size 0x350000

 3473408 bytes read: OK

 

NAND read: device 0 offset 0xb00000, size 0x180000

 1572864 bytes read: OK

Boot with zImage

get_format

-------- 1 --------

## Loading init Ramdisk from Legacy Image at 30a00000 ...

   Image Name:   ramdisk

   Created:      2011-05-21   8:46:42 UTC

   Image Type:   ARM Linux RAMDisk Image (uncompressed)

   Data Size:    1321940 Bytes =  1.3 MB

   Load Address: 30800000

   Entry Point:  30800000

   Verifying Checksum ... OK

 

Starting kernel ...

 

Uncompressing Linux........................................................................................................................................................................................................................ done, booting the kernel.

Initializing cgroup subsys cpu

Linux version 2.6.32.9 (root@ubuntu) (gcc version 4.4.1 (Sourcery G++ Lite 2009q3-67) ) #1 PREEMPT Fri Jun 3 03:51:29 EDT 2011

CPU: ARMv7 Processor [412fc082] revision 2 (ARMv7), cr=10c53c7f

CPU: VIPT nonaliasing data cache, VIPT nonaliasing instruction cache

Machine: SMDKV210

Ignoring unrecognised tag 0x41001099

Memory policy: ECC disabled, Data cache writeback

  Normal zone: 1 pages exceeds realsize 0

  Normal zone: 1 pages exceeds realsize 0

CPU S5PV210/S5PC110 (id 0x43110220)

S3C24XX Clocks, Copyright 2004 Simtec Electronics

copy: bad source 0

mout_audss: bad source 0

S5PV210: PLL settings, A=1000000000, M=667000000, E=80000000

s5pv210: 36864 KB system memory reserved for mfc at bank[1] 0x40204000

s5pv210: 36864 KB system memory reserved for mfc at bank[0] 0x30b43000

s5pv210: 10240 KB system memory reserved for fimc0 at bank[1] 0x42604000

s5pv210: 4096 KB system memory reserved for fimc1 at bank[1] 0x43004000

s5pv210: 8192 KB system memory reserved for fimc2 at bank[1] 0x43404000

s5pv210: 10240 KB system memory reserved for pmem at bank[0] 0x32f43000

s5pv210: 8192 KB system memory reserved for pmem_gpu1 at bank[1] 0x43c04000

s5pv210: 2048 KB system memory reserved for pmem_adsp at bank[0] 0x33943000

s5pv210: 4096 KB system memory reserved for jpeg at bank[1] 0x44404000

s5pv210: 8192 KB system memory reserved for texstream at bank[0] 0x33b43000

s5pv210: 8192 KB system memory reserved for fimd at bank[1] 0x44804000

s5pv210: 4096 KB system memory reserved for g2d at bank[1] 0x45004000

Built 2 zonelists in Zone order, mobility grouping on.  Total pages: 130048

Kernel command line: root=/dev/mmcblk0p2 rootfstype=ext3 rw init=/init console=ttySAC3,115200 androidboot.console=s3c2410_serial3 rootdelay=1

PID hash table entries: 2048 (order: 1, 8192 bytes)

Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)

Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)

Memory: 256MB 256MB = 512MB total

Memory: 368896KB available (5620K code, 1502K data, 152K init, 0K highmem)

SLUB: Genslabs=9, HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=4

Hierarchical RCU implementation.

NR_IRQS:339

VIC @f4000000: id 0x00041192, vendor 0x41

VIC @f4010000: id 0x00041192, vendor 0x41

VIC @f4020000: id 0x00041192, vendor 0x41

vic_pm_register: too few VICs, increase CONFIG_ARM_VIC_NR

VIC @f4030000: id 0x00041192, vendor 0x41

vic_pm_register: too few VICs, increase CONFIG_ARM_VIC_NR

mult[140737]

max_delta_ns[2147483647]

min_delta_ns[30517]

rate[32768]

HZ[256]

Console: colour dummy device 80x30

console [ttySAC3] enabled

Calibrating delay loop... 996.00 BogoMIPS (lpj=1945600)

Mount-cache hash table entries: 512

CPU: Testing write buffer coherency: ok

regulator: core version 0.5

NET: Registered protocol family 16

S5PC110 Hardware version : EVT1 

S3C Power Management, Copyright 2004 Simtec Electronics

cam0 power: ON

ov9650 reset:1

S5PV210 Power Domain API Enable

S5PV210: Initializing architecture

s3c24xx-pwm s3c24xx-pwm.0: tin at 66700000, tdiv at 66700000, tin=divclk, base 0

bio: create slab <bio-0> at 0

s3c-i2c s3c2410-i2c.0: slave address 0x10

s3c-i2c s3c2410-i2c.0: bus frequency set to 65 KHz

s3c-i2c s3c2410-i2c.0: i2c-0: S3C I2C adapter

s3c-i2c s3c2410-i2c.1: slave address 0x10

s3c-i2c s3c2410-i2c.1: bus frequency set to 81 KHz

s3c-i2c s3c2410-i2c.1: i2c-1: S3C I2C adapter

s3c-i2c s3c2410-i2c.2: slave address 0x10

s3c-i2c s3c2410-i2c.2: bus frequency set to 65 KHz

s3c-i2c s3c2410-i2c.2: i2c-2: S3C I2C adapter

vgaarb: loaded

SCSI subsystem initialized

usbcore: registered new interface driver usbfs

usbcore: registered new interface driver hub

usbcore: registered new device driver usb

Bluetooth: Core ver 2.15

NET: Registered protocol family 31

Bluetooth: HCI device and connection manager initialized

Bluetooth: HCI socket layer initialized

Switching to clocksource clock_source_systimer

Slow work thread pool: Starting up

Slow work thread pool: Ready

FS-Cache: Loaded

NET: Registered protocol family 2

IP route cache hash table entries: 4096 (order: 2, 16384 bytes)

TCP established hash table entries: 16384 (order: 5, 131072 bytes)

TCP bind hash table entries: 16384 (order: 6, 327680 bytes)

TCP: Hash tables configured (established 16384 bind 16384)

TCP reno registered

NET: Registered protocol family 1

Trying to unpack rootfs image as initramfs...

Freeing initrd memory: 1288K

wifi_status:0,bt_status:0

S5PV210 ADC driver, (c) 2010 Samsung Electronics

Loaded driver for PL330 DMAC-0 s3c-pl330

        DBUFF-64x8bytes Num_Chans-8 Num_Peri-2 Num_Events-32

Loaded driver for PL330 DMAC-1 s3c-pl330

        DBUFF-8x4bytes Num_Chans-8 Num_Peri-32 Num_Events-32

Loaded driver for PL330 DMAC-2 s3c-pl330

        DBUFF-8x4bytes Num_Chans-8 Num_Peri-32 Num_Events-32

NetWinder Floating Point Emulator V0.97 (extended precision)

ashmem: initialized

JFFS2 version 2.2. (NAND) (SUMMARY)  ? 2001-2006 Red Hat, Inc.

ROMFS MTD (C) 2007 Red Hat, Inc.

msgmni has been set to 724

alg: No test for fcrypt (fcrypt-generic)

alg: No test for stdrng (krng)

io scheduler noop registered

io scheduler anticipatory registered

io scheduler deadline registered

io scheduler cfq registered (default)

i2c /dev entries driver

Linux video capture interface: v2.00

IPC probe success

mfc_init: <6>S5PC110 MFC Driver, (c) 2009 Samsung Electronics

 

S3C JPEG Driver, (c) 2007 Samsung Electronics

JPEG driver for S5PV210 

S5P Rotator Driver, (c) 2008 Samsung Electronics

rotator_probe   called

rotator_probe   success

i2c i2c-1: attached s5p_ddc into i2c adapter successfully

S5PV210 HPD Driver, (c) 2009 Samsung Electronics

S5PC11X CEC Driver, (c) 2009 Samsung Electronics

S5PC1XX TVOUT Driver, (c) 2009 Samsung Electronics

[TVBASE] s5p_tv_clk_gate: tv clks are 1

s5p-tvout s5p-tvout: hpd status is cable removed

[TVBASE] s5p_tv_clk_gate: tv clks are 0

axp192_pmic_probe[640] id:3

regulator: LDO2: 3300 mV 

regulator: LDO3: 3000 mV 

 [axp] axp192_set_voltage: ldo:4

 [axp] axp192_set_voltage: vol_map:2500,reg:91,shift:4

 [axp] axp192_set_voltage: StepValue:7,tmp:112axp192_ldo_enable[219] ldo 4

regulator: LDO4: 2500 mV 

 [axp] axp192_buck_set_voltage: ldo:5

 [axp] axp192_buck_set_voltage: vol_map:1100,reg:26

 [axp] axp192_buck_set_voltage: StepValue:16,tmp:16

 [axp] axp192_buck_set_voltage: set:16

regulator: BUCK1: 1100 mV 

axp192_ldo_enable[219] ldo 6

regulator: BUCK2: 1800 mV 

 [axp] axp192_buck_set_voltage: ldo:7

 [axp] axp192_buck_set_voltage: vol_map:1250,reg:27

 [axp] axp192_buck_set_voltage: StepValue:22,tmp:22

 [axp] axp192_buck_set_voltage: set:22

regulator: BUCK3: 1250 mV 

bl:255,period:78770

off4

         s3cfb_probe 1357

s3cfb s3cfb: [fb2] dma: 0x44804000, cpu: 0xe2000000, size: 0x002ee000

fbcon: s3cfb (fb0) is primary device

Console: switching to colour frame buffer device 100x30

FIMD src sclk = 133400000

+++s3cfb_backlight_on

s3cfb s3cfb: registered successfully

s5pv210-uart.0: s3c2410_serial0 at MMIO 0xe2900000 (irq = 16) is a S3C6400/10

s5pv210-uart.1: s3c2410_serial1 at MMIO 0xe2900400 (irq = 20) is a S3C6400/10

s5pv210-uart.2: s3c2410_serial2 at MMIO 0xe2900800 (irq = 24) is a S3C6400/10

s5pv210-uart.3: s3c2410_serial3 at MMIO 0xe2900c00 (irq = 28) is a S3C6400/10

brd: module loaded

loop: module loaded

pmem: 1 init

pmem_gpu1: 1 init

pmem_adsp: 1 init

S3C NAND Driver, (c) 2008 Samsung Electronics

+++maf:ec.

+++dev:dc.

S3C NAND Driver is using hardware ECC.

NAND device: Manufacturer ID: 0xec, Chip ID: 0xdc (Samsung NAND 512MiB 3,3V 8-bit)

Creating 7 MTD partitions on "s5pv210-nand":

0x0000000c0000-0x000000100000 : "misc"

0x000000100000-0x000000600000 : "recovery"

0x000000600000-0x000000b00000 : "kernel"

0x000000b00000-0x000000e00000 : "ramdisk"

0x000000e00000-0x000008600000 : "system"

0x000008600000-0x00000d600000 : "cache"

0x00000d600000-0x000020000000 : "userdata"

PPP generic driver version 2.4.2

PPP Deflate Compression module registered

PPP BSD Compression module registered

NET: Registered protocol family 24

PPPoL2TP kernel driver, V1.0

SLIP: version 0.8.4-NET3.019-NEWTTY (dynamic channels, max=256).

dm9000 Ethernet Driver, V1.31

eth0: dm9000a at e08e4000,e08e8002 IRQ 46 MAC: 00:09:c0:ff:ec:48 (chip)

usbcore: registered new interface driver asix

libertas_sdio: Libertas SDIO driver

libertas_sdio: Copyright Pierre Ossman

ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver

s5pv210-ehci s5pv210-ehci: s5pv210 EHCI

s5pv210-ehci s5pv210-ehci: new USB bus registered, assigned bus number 1

s5pv210-ehci s5pv210-ehci: irq 87, io mem 0xec200000

s5pv210-ehci s5pv210-ehci: USB 0.0 started, EHCI 1.00

usb usb1: configuration #1 chosen from 1 choice

hub 1-0:1.0: USB hub found

hub 1-0:1.0: 1 port detected

ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver

s5pv210-ohci s5pv210-ohci: s5pv210 OHCI

s5pv210-ohci s5pv210-ohci: new USB bus registered, assigned bus number 2

s5pv210-ohci s5pv210-ohci: irq 87, io mem 0xec300000

usb usb2: configuration #1 chosen from 1 choice

hub 2-0:1.0: USB hub found

hub 2-0:1.0: 1 port detected

usbcore: registered new interface driver cdc_acm

cdc_acm: v0.26:USB Abstract Control Model driver for USB modems and ISDN adapters

Initializing USB Mass Storage driver...

usbcore: registered new interface driver usb-storage

USB Mass Storage support registered.

usbcore: registered new interface driver usbserial

++++++vendor:1529,product:0,flags:3

++++++vendor:7326,product:24673,flags:3

USB Serial support registered for generic

usbcore: registered new interface driver usbserial_generic

usbserial: USB Serial Driver core

USB Serial support registered for GSM modem (1-port)

usbcore: registered new interface driver option

option: v0.7.2:USB Driver for GSM modems

s3c-udc : S3C HS USB OTG Device Driver, (c) 2008-2009 Samsung Electronics

s3c-udc : version 15 March 2009 (DMA Mode) 

android init

android_probe pdata: c0617408

android_bind

android_usb gadget: android_usb ready

Registered gadget driver 'android_usb'

f_adb init

android_register_function adb

f_mass_storage init

android_register_function usb_mass_storage

mass_storage_bind_config

fsg_probe pdata: c061742c

android_usb gadget: Number of LUNs=2

adb_bind_config

tty_register_ldisc:0

mice: could not register psaux device, error: -16

mice: PS/2 mouse device common for all mice

input: wy-keys as /devices/platform/wy-keys/input/input0

S5P Touchscreen driver, (c) 2008 Samsung Electronics

S5P TouchScreen got loaded successfully : 12 bits

input: S5P TouchScreen as /devices/virtual/input/input1

==ft5x0x_ts_init_gpio=

==request_irq=

input: ft5x0x_ts as /devices/virtual/input/input2

msg ft5x0x_i2c_rxdata i2c read error: -6

ft5x0x_read_data read_data i2c_rxdata failed: -6

==register_early_suspend =

bma150 1-0038: bma150 probe

bma150 1-0038: bma150 found

bma150 1-0038: al_version=2, ml_version=1

bma150 1-0038: position:5

input: accelerometer as /devices/virtual/input/input3

input: orientation as /devices/virtual/input/input4

S3C24XX RTC, (c) 2004,2006 Simtec Electronics

using rtc device, s3c, for alarms

s3c2410-rtc s3c2410-rtc: rtc core: registered s3c as rtc0

s3c_bat_init

wy-battery wy-battery: s3c_bat_probe

S3C2410 Watchdog Timer, (c) 2004 Simtec Electronics

s3c2410-wdt s3c2410-wdt: watchdog inactive, reset disabled, irq enabled

device-mapper: ioctl: 4.15.0-ioctl (2009-04-01) initialised: dm-devel@redhat.com

Bluetooth: Virtual HCI driver ver 1.3

Bluetooth: HCI UART driver ver 2.2

Bluetooth: HCI H4 protocol initialized

Bluetooth: HCI BCSP protocol initialized

Bluetooth: HCILL protocol initialized

usb 1-1: new high speed USB device using s5pv210-ehci and address 2

cpuidle: using governor ladder

sdhci: Secure Digital Host Controller Interface driver

sdhci: Copyright(c) Pierre Ossman

s3c-sdhci s3c-sdhci.0: clock source 2: sclk_mmc (47642857 Hz)

Registered led device: mmc0::

mmc0: SDHCI controller on samsung-hsmmc [s3c-sdhci.0] using ADMA

s3c-sdhci s3c-sdhci.1: clock source 2: sclk_mmc (47642857 Hz)

Registered led device: mmc1::

mmc1: SDHCI controller on samsung-hsmmc [s3c-sdhci.1] using ADMA

s3c-sdhci s3c-sdhci.2: clock source 2: sclk_mmc (47642857 Hz)

Registered led device: mmc2::

mmc2: SDHCI controller on samsung-hsmmc [s3c-sdhci.2] using ADMA

s3c-sdhci s3c-sdhci.3: clock source 2: sclk_mmc (47642857 Hz)

Registered led device: mmc3::

mmc3: SDHCI controller on samsung-hsmmc [s3c-sdhci.3] using ADMA

usbcore: registered new interface driver usbhid

usbhid: v2.6:USB HID core driver

logger: created 64K log 'log_main'

logger: created 256K log 'log_events'

logger: created 64K log 'log_radio'

logger: created 64K log 'log_system'

Advanced Linux Sound Architecture Driver Version 1.0.21.

usbcore: registered new interface driver snd-usb-audio

WM9713/WM9714 SoC Audio Codec 0.15

s3c_preallocate_dma_buffer: VA-ff00a000, PA-3F260000, 131072bytes

s3c_preallocate_dma_buffer: VA-ff02a000, PA-3F280000, 131072bytes

asoc: AC97 HiFi <-> s3c-ac97 mapping ok

usb 1-1: configuration #1 chosen from 1 choice

hub 1-1:1.0: USB hub found

hub 1-1:1.0: 4 ports detected

ALSA device list:

  #0: SMDK (WM9713)

TCP cubic registered

NET: Registered protocol family 17

Bluetooth: L2CAP ver 2.14

Bluetooth: L2CAP socket layer initialized

Bluetooth: SCO (Voice Link) ver 0.6

Bluetooth: SCO socket layer initialized

Bluetooth: RFCOMM TTY layer initialized

Bluetooth: RFCOMM socket layer initialized

Bluetooth: RFCOMM ver 1.11

Bluetooth: BNEP (Ethernet Emulation) ver 1.3

Bluetooth: BNEP filters: protocol multicast

Bluetooth: HIDP (Human Interface Emulation) ver 1.2

NET: Registered protocol family 33

RxRPC: Registered security type 2 'rxkad'

lib80211: common routines for IEEE802.11 drivers

VFP support v0.3: implementor 41 architecture 3 part 30 variant c rev 2

s3c-fimc: fimc_init_global: moutcam:c0612618

OV9665 1-0030: ov9665 has been probed

OV9665 1-0030: fetching platform data

OV9665 1-0030: parallel mode

FIMC0 registered successfully

FIMC1 registered successfully

FIMC2 registered successfully

regulator_init_complete: incomplete constraints, leaving VCC_ARM on

regulator_init_complete: incomplete constraints, leaving VCC_INT on

regulator_init_complete: incomplete constraints, leaving VDDCAM2.5V on

regulator_init_complete: incomplete constraints, leaving VDDIO3.0V on

regulator_init_complete: incomplete constraints, leaving VDDIO3.3V on

============== RTC Debug Param =================

tm_year = 1326

tm_mon  = 11

tm_mday = 10

tm_hour = 33

tm_min  = 76

tm_sec  = 4

================================================

============== RTC set to default system time =================

tm_year = 110

tm_mon  = 10

tm_mday = 1

tm_hour = 0

tm_min  = 0

tm_sec  = 0

===============================================================

s3c2410-rtc s3c2410-rtc: setting system clock to 2010-11-01 00:00:00 UTC (1288569600)

Freeing init memory: 152K

init: /init.rc: 155: invalid command 'alsa_ctl'

init: cannot open '/initlogo.rle'

PA FB = 0x44804000, bits per pixel = 32

screen width=800 height=480 va=0xd4804000 pa=0x44804000

Back frameBuffer[0].VAddr=d497b000 PAddr=4497b000 size=1536000

yaffs: dev is 32505860 name is "mtdblock4" rw

yaffs: passed flags ""

yaffs: dev is 32505862 name is "mtdblock6" rw

yaffs: passed flags ""

init: cannot find '/system/bin/orientationd', disabling 'orientationd'

init: cannot find '/system/bin/geomagneticd', disabling 'geomagneticd'

init: cannot execve('/system/etc/init.smdkv210.sh'): Permission denied

enabling adb

adb_open

root@android:/ # warning: `rild' uses 32-bit capabilities (legacy support in use)

PVR_K:(Warning): SysFinalise: Version string: SGX540 S5PC110 [473, services4/system/s5pc110/sysconfig.c]

DmaAddr=@3f260000 Total=32768bytes PrdSz=8192 #Prds=4, dmaEnd 0x3f268000

s3c-nand: 1 bit error detected at byte 68, correcting from 0x33 to 0x32...OK

s3c-fimc: FIMC2 1 opened.

fimc_g_ctrl...fimc_g_ctrl_outputfimc_g_ctrl...fimc_g_ctrl_output[TVBASE] s5p_tv_clk_gate: tv clks are 1

TV Open successful.

鉴于许多朋友在U-BOOT移植DM9000AEP驱动遇到的问题，我把最近改了一下的驱动发给大家作参考。
在U-BOOT 1.3中使用没问题，启动时需要大于1S的等待时间，DM9000才开始工作。 

/*
  dm9000.c: Version 1.2 12/15/2003

        A Davicom DM9000 ISA NIC fast Ethernet driver for Linux.
        Copyright (C) 1997  Sten Wang

        This program is free software; you can redistribute it and/or
        modify it under the terms of the GNU General Public License
        as published by the Free Software Foundation; either version 2
        of the License, or (at your option) any later version.

        This program is distributed in the hope that it will be useful,
        but WITHOUT ANY WARRANTY; without even the implied warranty of
        MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
        GNU General Public License for more details.

  (C)Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.

V0.11   06/20/2001      REG_0A bit3=1, default enable BP with DA match
        06/22/2001      Support DM9801 progrmming
                        E3: R25 = ((R24 + NF) & 0x00ff) | 0xf000
                        E4: R25 = ((R24 + NF) & 0x00ff) | 0xc200
                R17 = (R17 & 0xfff0) | NF + 3
                        E5: R25 = ((R24 + NF - 3) & 0x00ff) | 0xc200
                R17 = (R17 & 0xfff0) | NF

v1.00                   modify by simon 2001.9.5
                        change for kernel 2.4.x

v1.1   11/09/2001       fix force mode bug

v1.2   03/18/2003       Weilun Huang <weilun_huang@davicom.com.tw>:
                        Fixed phy reset.
                        Added tx/rx 32 bit mode.
                        Cleaned up for kernel merge.

--------------------------------------

       12/15/2003       Initial port to u-boot by Sascha Hauer <saschahauer@web.de>

TODO: Homerun NIC and longrun NIC are not functional, only internal at the
      moment.
*/

#include <common.h>
#include <command.h>
#include <net.h>
#include <asm/io.h>

#ifdef CONFIG_DRIVER_DM9000

#include "dm9000x.h"

/* Board/System/Debug information/definition ---------------- */

#define DM9801_NOISE_FLOOR      0x08
#define DM9802_NOISE_FLOOR      0x05

/* #define CONFIG_DM9000_DEBUG */

#ifdef CONFIG_DM9000_DEBUG
#define DM9000_DBG(fmt,args...) printf(fmt ,##args)
#else                           /*  */
#define DM9000_DBG(fmt,args...)
#endif                          /*  */
enum DM9000_PHY_mode { DM9000_10MHD = 0, DM9000_100MHD =
            1, DM9000_10MFD = 4, DM9000_100MFD = 5, DM9000_AUTO =
            8, DM9000_1M_HPNA = 0x10
};
enum DM9000_NIC_TYPE { FASTETHER_NIC = 0, HOMERUN_NIC = 1, LONGRUN_NIC = 2
};

/* Structure/enum declaration ------------------------------- */
typedef struct board_info {
        u32 runt_length_counter;        /* counter: RX length < 64byte */
        u32 long_length_counter;        /* counter: RX length > 1514byte */
        u32 reset_counter;      /* counter: RESET */
        u32 reset_tx_timeout;   /* RESET caused by TX Timeout */
        u32 reset_rx_status;    /* RESET caused by RX Statsus wrong */
        u16 tx_pkt_cnt;
        u16 queue_start_addr;
        u16 dbug_cnt;
        u8 phy_addr;
        u8 device_wait_reset;   /* device state */
        u8 nic_type;            /* NIC type */
        unsigned char srom[128];
} board_info_t;
board_info_t dmfe_info;

/* For module input parameter */
//static int media_mode = DM9000_AUTO; /* weiyan,use full duplex mode */
static int media_mode = DM9000_100MFD;
static u8 nfloor = 0;

/* function declaration ------------------------------------- */
int eth_init(bd_t * bd);
int eth_send(volatile void *, int);
int eth_rx(void);
void eth_halt(void);
void eth_halt_true(void);
static int dm9000_probe(void);
static u16 phy_read(int);
static void phy_write(int, u16);
u16 read_srom_word(int);
static u8 DM9000_ior(int);
static void DM9000_iow(int reg, u8 value);

/* DM9000 network board routine ---------------------------- */

#define DM9000_outb(d,r) ( *(volatile u8 *)r = d )
#define DM9000_outw(d,r) ( *(volatile u16 *)r = d )
#define DM9000_outl(d,r) ( *(volatile u32 *)r = d )
#define DM9000_inb(r) (*(volatile u8 *)r)
#define DM9000_inw(r) (*(volatile u16 *)r)
#define DM9000_inl(r) (*(volatile u32 *)r)

#ifdef CONFIG_DM9000_DEBUG
static void
dump_regs(void)
{
        DM9000_DBG("\n");
        DM9000_DBG("NCR   (0x00): %02x\n", DM9000_ior(0));
        DM9000_DBG("NSR   (0x01): %02x\n", DM9000_ior(1));
        DM9000_DBG("TCR   (0x02): %02x\n", DM9000_ior(2));
        DM9000_DBG("TSRI  (0x03): %02x\n", DM9000_ior(3));
        DM9000_DBG("TSRII (0x04): %02x\n", DM9000_ior(4));
        DM9000_DBG("RCR   (0x05): %02x\n", DM9000_ior(5));
        DM9000_DBG("RSR   (0x06): %02x\n", DM9000_ior(6));
//      DM9000_DBG("ISR   (0xFE): %02x\n", DM9000_ior(ISR));
        DM9000_DBG("\n");
}
#endif                          /*  */

/*
  Search DM9000 board, allocate space and register it
*/
int
dm9000_probe(void)
{
        u32 id_val;
        id_val = DM9000_ior(DM9000_VIDL);
        id_val |= DM9000_ior(DM9000_VIDH) << 8;
        id_val |= DM9000_ior(DM9000_PIDL) << 16;
        id_val |= DM9000_ior(DM9000_PIDH) << 24;
        if (id_val == DM9000_ID) {
                printf("dm9000 i/o: 0x%x, id: 0x%x \n", CONFIG_DM9000_BASE,
                       id_val);
                return 0;
        } else {
                printf("dm9000 not found at 0x%08x id: 0x%08x\n",
                       CONFIG_DM9000_BASE, id_val);
                return -1;
        }
}

/* Set PHY operationg mode
*/
static void
set_PHY_mode(void)
{
        u16 phy_reg4 = 0x01e1, phy_reg0 = 0x1000;
        if (!(media_mode & DM9000_AUTO)) {
                switch (media_mode) {
                case DM9000_10MHD:
                        phy_reg4 = 0x21;
                        phy_reg0 = 0x0000;
                        break;
                case DM9000_10MFD:
                        phy_reg4 = 0x41;
                        phy_reg0 = 0x1100;
                        break;
                case DM9000_100MHD:
                        phy_reg4 = 0x81;
                        phy_reg0 = 0x2000;
                        break;
                case DM9000_100MFD:
                        phy_reg4 = 0x101;
                        phy_reg0 = 0x3100;
                        break;
                }
                phy_write(4, phy_reg4); /* Set PHY media mode */
                phy_write(0, phy_reg0); /*  Tmp */
        }
        DM9000_iow(DM9000_GPCR, 0x01);  /* Let GPIO0 output */
        DM9000_iow(DM9000_GPR, 0x00);   /* Enable PHY */
}

/*
        Init HomeRun DM9801
*/
static void
program_dm9801(u16 HPNA_rev)
{
        __u16 reg16, reg17, reg24, reg25;
        if (!nfloor)
                nfloor = DM9801_NOISE_FLOOR;
        reg16 = phy_read(16);
        reg17 = phy_read(17);
        reg24 = phy_read(24);
        reg25 = phy_read(25);
        switch (HPNA_rev) {
        case 0xb900:            /* DM9801 E3 */
                reg16 |= 0x1000;
                reg25 = ((reg24 + nfloor) & 0x00ff) | 0xf000;
                break;
        case 0xb901:            /* DM9801 E4 */
                reg25 = ((reg24 + nfloor) & 0x00ff) | 0xc200;
                reg17 = (reg17 & 0xfff0) + nfloor + 3;
                break;
        case 0xb902:            /* DM9801 E5 */
        case 0xb903:            /* DM9801 E6 */
        default:
                reg16 |= 0x1000;
                reg25 = ((reg24 + nfloor - 3) & 0x00ff) | 0xc200;
                reg17 = (reg17 & 0xfff0) + nfloor;
        }
        phy_write(16, reg16);
        phy_write(17, reg17);
        phy_write(25, reg25);
}

/*
        Init LongRun DM9802
*/
static void
program_dm9802(void)
{
        __u16 reg25;
        if (!nfloor)
                nfloor = DM9802_NOISE_FLOOR;
        reg25 = phy_read(25);
        reg25 = (reg25 & 0xff00) + nfloor;
        phy_write(25, reg25);
}

/* Identify NIC type
*/
static void
identify_nic(void)
{
        struct board_info *db = &dmfe_info;     /* Point a board information structure */
        u16 phy_reg3;
        DM9000_iow(DM9000_NCR, NCR_EXT_PHY);
        phy_reg3 = phy_read(3);
        switch (phy_reg3 & 0xfff0) {
        case 0xb900:
                if (phy_read(31) == 0x4404) {
                        db->nic_type = HOMERUN_NIC;
                        program_dm9801(phy_reg3);
                        DM9000_DBG("found homerun NIC\n");
                } else {
                        db->nic_type = LONGRUN_NIC;
                        DM9000_DBG("found longrun NIC\n");
                        program_dm9802();
                }
                break;
        default:
                db->nic_type = FASTETHER_NIC;
                break;
        }
        DM9000_iow(DM9000_NCR, 0);
}

/* General Purpose dm9000 reset routine */
static void
dm9000_reset(void)
{
        DM9000_DBG("resetting\n");
//      DM9000_iow(DM9000_NCR, NCR_RST);
//      udelay(500);
        DM9000_iow(DM9000_NCR, NCR_RST);
        udelay(1000);
}

/* Initilize dm9000 board
*/
int
eth_init(bd_t * bd)
{
        eth_init_true(bd);
}

int eth_init_true(bd_t * bd)
{
        int i, oft, lnk;

        DM9000_DBG("eth_init()\n");

//      eth_halt_true();
        /* RESET device */
        dm9000_reset();
        dm9000_probe();

        /* NIC Type: FASTETHER, HOMERUN, LONGRUN */
//      identify_nic();

        /* GPIO0 on pre-activate PHY */
        DM9000_iow(DM9000_GPR, 0x00);   /*REG_1F bit0 activate phyxcer */

        /* copy from set_PHY_mode, do not set phy mode */
        DM9000_iow(DM9000_GPCR, 0x01);  /* Let GPIO0 output */
        DM9000_iow(DM9000_GPR, 0x00);   /* Enable PHY */
        /* Set PHY */
//      set_PHY_mode();

        /* Program operating register */
//      DM9000_iow(DM9000_NCR, 0x0);    /* only intern phy supported by now */
        /* cut from Linux, weiyan */

        DM9000_iow(DM9000_TCR, 0);      /* TX Polling clear */
        DM9000_iow(DM9000_BPTR, 0x3f);  /* Less 3Kb, 200us */
        DM9000_iow(DM9000_FCTR, FCTR_HWOT(3) | FCTR_LWOT(8));   /* Flow Control : High/Low Water */
        DM9000_iow(DM9000_FCR, 0x0);    /* SH FIXME: This looks strange! Flow Control */
        DM9000_iow(DM9000_SMCR, 0);     /* Special Mode */
        DM9000_iow(DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END);   /* clear TX status */
        DM9000_iow(DM9000_ISR, 0x0f);   /* Clear interrupt status */

        /* Set Node address */
//      for (i = 0; i < 6; i++)
//              ((u16 *) bd->bi_enetaddr)[i] = read_srom_word(i);

        if (is_zero_ether_addr(bd->bi_enetaddr) ||
            is_multicast_ether_addr(bd->bi_enetaddr)) {
                /* try reading from environment */
                u8 i;
                char *s, *e;
                s = getenv ("ethaddr");
                for (i = 0; i < 6; ++i) {
                        bd->bi_enetaddr[i] = s ?
                                simple_strtoul (s, &e, 16) : 0;
                        if (s)
                                s = (*e) ? e + 1 : e;
                }
        }

        printf("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n", bd->bi_enetaddr[0],
               bd->bi_enetaddr[1], bd->bi_enetaddr[2], bd->bi_enetaddr[3],
               bd->bi_enetaddr[4], bd->bi_enetaddr[5]);
        for (i = 0, oft = 0x10; i < 6; i++, oft++)
                DM9000_iow(oft, bd->bi_enetaddr[i]);
        for (i = 0, oft = 0x16; i < 8; i++, oft++)
                DM9000_iow(oft, 0xff);

        /* read back mac, just to be sure */
        for (i = 0, oft = 0x10; i < 6; i++, oft++)
                DM9000_DBG("%02x:", DM9000_ior(oft));
        DM9000_DBG("\n");

        /* Activate DM9000 */
        DM9000_iow(DM9000_RCR, RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN);  /* RX enable */
        DM9000_iow(DM9000_IMR, IMR_PAR);        /* Enable TX/RX interrupt mask */
#if 0   //weibing
        i = 0;
        while (!(phy_read(1) & 0x20)) { /* autonegation complete bit */
                udelay(1000);
                i++;
                if (i == 10000) {
                        printf("could not establish link\n");
                        return 0;
                }
        }
#endif
#if 0
        /* see what we've got */
        lnk = phy_read(17) >> 12;
        printf("operating at ");
        switch (lnk) {
        case 1:
                printf("10M half duplex ");
                break;
        case 2:
                printf("10M full duplex ");
                break;
        case 4:
                printf("100M half duplex ");
                break;
        case 8:
                printf("100M full duplex ");
                break;
        default:
                printf("unknown: %d ", lnk);
                break;
        }
        printf("mode\n");
#endif
       printf("operating at 100M full duplex mode\n");
        return 0;
}

/*
  Hardware start transmission.
  Send a packet to media from the upper layer.
*/
int
eth_send(volatile void *packet, int length)
{
        char *data_ptr;
        u32 tmplen, i;
        int tmo;
        DM9000_DBG("eth_send: length: %d\n", length);
        for (i = 0; i < length; i++) {
                if (i % 8 == 0)
                        DM9000_DBG("\nSend: 02x: ", i);
                DM9000_DBG("%02x ", ((unsigned char *) packet)[i]);
        } DM9000_DBG("\n");

        /* Move data to DM9000 TX RAM */
        data_ptr = (char *) packet;
        DM9000_outb(DM9000_MWCMD, DM9000_IO);

#ifdef CONFIG_DM9000_USE_8BIT
        /* Byte mode */
        for (i = 0; i < length; i++)
                DM9000_outb((data_ptr[i] & 0xff), DM9000_DATA);

#endif                          /*  */
#ifdef CONFIG_DM9000_USE_16BIT
        tmplen = (length + 1) / 2;
        for (i = 0; i < tmplen; i++)
                DM9000_outw(((u16 *) data_ptr)[i], DM9000_DATA);

#endif                          /*  */
#ifdef CONFIG_DM9000_USE_32BIT
        tmplen = (length + 3) / 4;
        for (i = 0; i < tmplen; i++)
                DM9000_outl(((u32 *) data_ptr)[i], DM9000_DATA);

#endif                          /*  */

        /* Set TX length to DM9000 */
        DM9000_iow(DM9000_TXPLL, length & 0xff);
        DM9000_iow(DM9000_TXPLH, (length >> 8) & 0xff);

        /* Issue TX polling command */
        DM9000_iow(DM9000_TCR, TCR_TXREQ);      /* Cleared after TX complete */

        /* wait for end of transmission */
        tmo = get_timer(0) + 5 * CFG_HZ;
        while (DM9000_ior(DM9000_TCR) & TCR_TXREQ) {
                if (get_timer(0) >= tmo) {
                        printf("transmission timeout\n");
                        break;
                }
        }
        DM9000_DBG("transmit done\n\n");
        return 0;
}

/*
  Stop the interface.
  The interface is stopped when it is brought.
*/
void eth_halt(void){}

void
eth_halt_true(void)
{
#if 1   //weibing
        DM9000_DBG("eth_halt\n");

        /* RESET devie */
        phy_write(0, 0x8000);   /* PHY RESET */
        DM9000_iow(DM9000_GPR, 0x01);   /* Power-Down PHY */
        DM9000_iow(DM9000_IMR, 0x80);   /* Disable all interrupt */
        DM9000_iow(DM9000_RCR, 0x00);   /* Disable RX */
#endif
}

/*
  Received a packet and pass to upper layer
*/
int
eth_rx(void)
{
        u8 rxbyte, *rdptr = (u8 *) NetRxPackets[0];
        u16 RxStatus, RxLen = 0;
        u32 tmplen, i;
#ifdef CONFIG_DM9000_USE_32BIT
        u32 tmpdata;
#endif

        /* Check packet ready or not */
//weibing
        DM9000_ior(DM9000_MRRH);
        DM9000_ior(DM9000_MRRL);        //must add this two read,weiyan
        DM9000_ior(DM9000_MRCMDX);      /* Dummy read */
        rxbyte = DM9000_inb(DM9000_DATA);       /* Got most updated data */

        if (rxbyte == 0)
                return 0;

        /* Status check: this byte must be 0 or 1 */
        if (rxbyte > 1) {
                DM9000_iow(DM9000_RCR, 0x00);   /* Stop Device */
                DM9000_iow(DM9000_ISR, 0x80);   /* Stop INT request */
                DM9000_DBG("rx status check: %d\n", rxbyte);
                return;
        }
        DM9000_DBG("receiving packet\n");

        /* A packet ready now  & Get status/length */
        DM9000_outb(DM9000_MRCMD, DM9000_IO);

#ifdef CONFIG_DM9000_USE_8BIT
        RxStatus = DM9000_inb(DM9000_DATA) + (DM9000_inb(DM9000_DATA) << 8);
        RxLen = DM9000_inb(DM9000_DATA) + (DM9000_inb(DM9000_DATA) << 8);

#endif                          /*  */
#ifdef CONFIG_DM9000_USE_16BIT
        RxStatus = DM9000_inw(DM9000_DATA);
        RxLen = DM9000_inw(DM9000_DATA);

#endif                          /*  */
#ifdef CONFIG_DM9000_USE_32BIT
        tmpdata = DM9000_inl(DM9000_DATA);
        RxStatus = tmpdata;
        RxLen = tmpdata >> 16;

#endif                          /*  */
        DM9000_DBG("rx status: 0x%04x rx len: %d\n", RxStatus, RxLen);

        /* Move data from DM9000 */
        /* Read received packet from RX SRAM */
#ifdef CONFIG_DM9000_USE_8BIT
        for (i = 0; i < RxLen; i++)
                rdptr[i] = DM9000_inb(DM9000_DATA);

#endif                          /*  */
#ifdef CONFIG_DM9000_USE_16BIT
        tmplen = (RxLen + 1) / 2;
        for (i = 0; i < tmplen; i++)
                ((u16 *) rdptr)[i] = DM9000_inw(DM9000_DATA);
/*      printf("length:%d\n", RxLen);
        for (i = 0; i < RxLen+1; i++)
         if(rdptr[i]>='0' && rdptr[i]<='9' || rdptr[i]>='a' && rdptr[i]<='f')
                        printf("i:%3d %c ",i, rdptr[i]);
        printf("\n");
*/
#endif                          /*  */
#ifdef CONFIG_DM9000_USE_32BIT
        tmplen = (RxLen + 3) / 4;
        for (i = 0; i < tmplen; i++)
                ((u32 *) rdptr)[i] = DM9000_inl(DM9000_DATA);

#endif                          /*  */
        if ((RxStatus & 0xbf00) || (RxLen < 0x40)
            || (RxLen > DM9000_PKT_MAX)) {
                if (RxStatus & 0x100) {
                        printf("rx fifo error\n");
                }
                if (RxStatus & 0x200) {
                        printf("rx crc error\n");
                }
                if (RxStatus & 0x8000) {
                        printf("rx length error\n");
                }
                if (RxLen > DM9000_PKT_MAX) {
                        printf("rx length too big\n");
                        dm9000_reset();
                }
        } else {
                /* Pass to upper layer */
                DM9000_DBG("passing packet to upper layer\n");
                NetReceive(NetRxPackets[0], RxLen);
                return RxLen;
        }
        return 0;
}

/*
  Read a word data from SROM
*/
u16
read_srom_word(int offset)
{
        DM9000_iow(DM9000_EPAR, offset);
        DM9000_iow(DM9000_EPCR, 0x4);
        udelay(8000);
        DM9000_iow(DM9000_EPCR, 0x0);
        return (DM9000_ior(DM9000_EPDRL) + (DM9000_ior(DM9000_EPDRH) << 8));
}

void
write_srom_word(int offset, u16 val)
{
        DM9000_iow(DM9000_EPAR, offset);
        DM9000_iow(DM9000_EPDRH, ((val >> 8) & 0xff));
        DM9000_iow(DM9000_EPDRL, (val & 0xff));
        DM9000_iow(DM9000_EPCR, 0x12);
        udelay(8000);
        DM9000_iow(DM9000_EPCR, 0);
}

/*
   Read a byte from I/O port
*/
static u8
DM9000_ior(int reg)
{
        DM9000_outb(reg, DM9000_IO);
        return DM9000_inb(DM9000_DATA);
}

/*
   Write a byte to I/O port
*/
static void
DM9000_iow(int reg, u8 value)
{
        DM9000_outb(reg, DM9000_IO);
        DM9000_outb(value, DM9000_DATA);
}

/*
   Read a word from phyxcer
*/
static u16
phy_read(int reg)
{
        u16 val;

        /* Fill the phyxcer register into REG_0C */
        DM9000_iow(DM9000_EPAR, DM9000_PHY | reg);
        DM9000_iow(DM9000_EPCR, 0xc);   /* Issue phyxcer read command */
//      udelay(100);            /* Wait read complete */        //weiyan
        udelay(1000);           /* Wait read complete */
        DM9000_iow(DM9000_EPCR, 0x0);   /* Clear phyxcer read command */
        val = (DM9000_ior(DM9000_EPDRH) << 8) | DM9000_ior(DM9000_EPDRL);

        /* The read data keeps on REG_0D & REG_0E */
        DM9000_DBG("phy_read(%d): %d\n", reg, val);
        return val;
}

/*
   Write a word to phyxcer
*/
static void
phy_write(int reg, u16 value)
{
        /* Fill the phyxcer register into REG_0C */
        DM9000_iow(DM9000_EPAR, DM9000_PHY | reg);

        /* Fill the written data into REG_0D & REG_0E */
        DM9000_iow(DM9000_EPDRL, (value & 0xff));
        DM9000_iow(DM9000_EPDRH, ((value >> 8) & 0xff));
        DM9000_iow(DM9000_EPCR, 0xa);   /* Issue phyxcer write command */
//      udelay(500);            /* Wait write complete */ //weiyan
        udelay(1000);           /* Wait write complete */
        DM9000_iow(DM9000_EPCR, 0x0);   /* Clear phyxcer write command */
        DM9000_DBG("phy_write(reg:%d, value:%d)\n", reg, value);
}
#endif                          /* CONFIG_DRIVER_DM9000 */

        好久没更新blog了，有点忙也有点懒^_^。自从上次十分简单地移植dm9000到试验箱后，就一直没关注具体的细节，直到这几天自己移植dm9000ae的驱动时才发现网友遇到的问题。u-boot自带的dm9000驱动是针对dm9000，一款比较老的isa接口芯片，而现在一般用的是dm9000ae升级版芯片。这个升级并非完全兼容，稍不注意，就会有莫名其妙的错误。

      1.超时问题，症状为不断地出现T。通过wireshark的抓包，有发送也有返回的包，但返回的包并没有被处理，直到T，然后重新发包。对比Linux的驱动，在收包前Linux会有
               ior(db,0xf4);
               ior(db,0xf5);
这两个动作。添加后问题解决。在这里说是缓冲区要复位，但我对比dm9000和dm9000ae的datasheet，都是说IMR位7置一时，缓冲区满时会自动复位。看不出dm9000和dm9000ae有什么差别...

      2.tftp传送失败。传送uImage，bootm后出现"Bad Data CRC"。wireshark抓包，发送和接收都正常。通过cmp与串口传过来的uImage对比，发现每1468个字节后会有8个字节的丢失。打开驱动的debug，print收到的包，发现收到的数据都正确，只不过包的最大长度为1460，后面的8个字节在随后的包中被上层丢弃了。同时，wireshark显示tftp的分包大小为1468，修改tftp的最大分包大小为1460，问题解决。

      3.每次接收都先停顿一个T。抓包，发现第一个arp包没有被抓到，即dm9000还没正常工作。而且每次接收都会等待一个T，即接收完后dm9000被停止。讲eth_init添加到board的初始化并注释eth_halt的内容，一切搞定^_^。

        总结很轻松，过程总是充满辛酸...经过半年的coding，分析能力也有了很大的提高。另外，工作很忙，希望大家不要问我要代码^_^

      哈哈，出粮了，买手机了，抽时间写了个uiq3的拨号软件，挺好玩的^_^，下面是it168里的文章。http://se.it168.com/viewthread.php?tid=815203&page=1&extra=

      上星期买了部w950i，找资源来到168，看到UCall很酷，但很久没更新，于是我做了一个升级版。
因为按键图片是动态载入的，所以程序反应有点慢。大家测试后给点意见^_^



将程序安装到卡上，会在resource\Apps\目录下创建TouchDial目录。所有程序用到的图片都放在这，
各位朋友可以将自己的图片替换掉原来的，diy一个自己的拨号盘。



更新了按键的间隔，横向间隔没了，但纵向的间隔怎么都搞不定。。。。



跟新了图片和拨打键的位置。喜欢原来位置的朋友下载dialkey.rar覆盖resource\Apps\Touchdial目录里的图片即可。

      终于有时间写点东西了。实习结束休息几天后马上奔到珠海，开始人生的另一个旅途。刚开始，工作很紧张，几乎喘不过气来。慢慢地，适应了，任务也逐步完成，开始发现这个城市也不错:) 其实每个城市都有自己的特点，相对广州，珠海的环境确实不错，只是感觉这个城市的节奏有点慢。记得去面谈那天，我问的士师傅珠海有什么特点，他第一个告诉我的就是慢。也许，柔和的海景需要漫步欣赏。

      可惜，出去游玩的时间不多，一个月来我的任务是负责CQT（移动网络质量测试终端）各模块的功能，平台是我熟悉的2440。难度不高，但任务挺重的，电话拨打、短信、彩信、邮件、网络下载等等。只可惜最后的录音放音模块还没完成，现在没有开发板好像也调试不了。期间，最搞笑的还是茶壶大哥，经常我睡觉他工作，我工作他睡觉，为人大大咧咧，睡觉打大呼噜^_^。

      这学期的课程不多，可以专心搞项目了，可是，还有一个问题没解决，有点遗憾。难道只有等待？

        8月，职场的正式第一站，珠海拱北之北--香洲。有我曾经向往的工作方式，日出而作日落而继续做...然而，还有更恐怖的茶壶大哥，工作时间平均为11点到5点...这个5点可是早上的5点！！！一个星期连续5天（至今为止:)），不知是不是在赶工程，其他大哥也一般工作到晚上10点...有点难以想象，这样工作，是不是有点累？

        工作差不多一个星期了，这星期主要负责gsm模块的拨号，写了两天的程序，被老手在4小时内从30K重构到15K，佩服得不得了...我接触的第一个高手，功夫有多深？10年。

下文本为献给我们尊敬的老师们而写，部分言语纯属多余 ^_^ 

     实习期间，我主要负责公司Windows CE 5.0（以下简称Wince） BSP（板级支持包）和BootLoader的研发工作。通过增强软件的容错性，减少个别硬件对系统的干扰，使开发板的稳定性得到很大的提高。下面是各阶段的工作总结。

 

       第一周，是BootLoader的调试，这一阶段主要完成Wince映象USB下载和烧写功能。刚开始时，由于对Wince的架构及其开发流程不熟悉，整个项目进度很慢。期间很多问题都不能快速判断原因所在，不得不通过仿真器一步一步的进行调试，找到出现问题的地方再查资料。确定问题的原因后，解决就十分容易。譬如Wince映象的较检，将NK.BIN解包时会根据内核虚地址的设置计算映像的入口地址和映像大小等。这时，对比BootLoader和内核的虚地址设置，问题便迎刃而解。虽然这阶段花了很长时间和很大的努力，但也正是这一阶段的知识积累，为后续工作打下坚实的基础。

 

       第二周，是Wince BSP的调试。由于原来的BSP不是针对现在这款开发板写的，导致开发板的运行存在不稳定的因素。第一个不稳定因素是启动后内存的不确定状态。原来的FMD（闪存媒质驱动）中会根据内存中的参数共享块IMAGE_SHARE_ARGS_UA_STAR判断是热启动还是冷启动，然后执行相应的操作。部分开发板的内存启动时并没有完全清空，致使启动失败。在BootLoader里手动将这块内存区清空，问题解决。第二个不稳定参数是电源和重启按键驱动与硬件不协调。大部分开发板能正常启动，只有少部分在打印了相关信息后便不能启动。通过驱动的源码可知，该驱动分别为电源和重启按键申请中断0和中断2，不能启动的开发板都停留在中断开启后。测量中断0的端口电压，只有1.5V，即不停的陷入中断循环中。原来是端口的电压被无故拉低。问题的解决也算简单，要不给相关端口接外部上拉电阻，要不将相关驱动去除。

 

       第三周，是给Wince BSP添加额外的功能。主要添加的功能有三个，分别是HIVE注册表的实现、NAND FLASH剩余空间的分区和RTC实时时钟的保存。关于HIVE注册表的保存，主要是修改注册表，使相关表项能在系统启动初期被加载。网上和Platform Builder自带的帮助都有详细的介绍和指示。但我按操作修改完后，却怎么也无法启动，最后实在没办法，尝试了一次Build and Sysgen，经过数小时的等待后，系统正常启动。估计是HIVE所需的部分代码没有被编译，才使启动失败。64M的NAND FLASH除去BootLoader和Wince映象所占的空间外，还有将近一半的空间供用户存储资料。但问题是BootLoader是自己写的，要移植Wince的分区管理，目前是不可能的事情。不行就换个角度吧，经过分析，FMD首先会查询每个块是否坏块，是则跳过，否则纳入其管核范围之内。这样的话，要达到我的目的就太容易了，告诉FMD的上层，存储BootLoader和Wince映象的空间都是坏的，剩下的空间便自然被纳入管理。RTC功能的添加也很简单，由于每次启动后，系统的时间都会初始化为一固定的时间。猜测是启动时执行了时间的设置，使时间停顿。事实证明，猜测是正确的，在RTC的驱动初始化时调用了OEMSetRealTime(pTime)函数，使每次启动的时间固定为pTime。注释该行后，时间正常。

 

       第四周，是部分驱动和BootLoader的修改。需要改的驱动主要有三个：网卡、LCD和触摸屏。首先接手的是网卡，但手头没有一点关于网卡驱动的资料，除了源代码。接连几天，没有一点进展，不得不暂时放弃。至于LCD驱动，主要是修改一下硬件的参数，使其工作于7寸和8寸的屏幕。由于之前已做过Linux下相关的修改，这一部分很快完成。但屏幕增大后，触摸屏的精度有很大的下降，直接测得的数据跳动很大。这一部分的解决与Linux相同，通过增加测量时间，取各测量值的平均值来调整触摸屏的精度。驱动修改完后，轮到Bootloader了，主要是添加图片显示和Wince映象加载的进度条显示。图片显示是在初始化LCD时，将已转为数组形式的BMP图片根据屏幕的分辨率逐点显示，最后便完整地显示整幅图片。而进度条则根据当前已读取的映象大小与总的映象大小之比来更新进度条的长度和相应的颜色，使加载的进度一目了然。

 

       第五周，是Linux相关说明文档的撰写。这部分之前已做过，也许是说明不够明晰，咨询者众。现在顺带升级根文件系统并撰写Step By Step文档，包括《基于Busybox的根文件系统制作》、《Linux内核的编译及烧写》、《Linux开发环境(NFS)的快速搭建》等。

 

       五周的实习生活很忙碌也很充实，除了以上工作外，还学习到不少公司运营的知识、营销的策略，算是迈进职场工作中踏出的坚实的第一步。

      实习快三周了，总算慢慢适应下来。上班很轻松，但上下班的路途却异常险峻...不知是身体累了，还是精神疲惫，搞得晚上的生活异常丰富，打机，看电影，虐待沙包...还有很多新的电影还没看完啊...

      当然，技术也算有点进展。上班的效率不错，现在对wince也有了一点了解。NAND Flash分区划分，HIVE注册表保存，RTC时钟保存，NK的usb下载和较检保存。还有一个有点意思的bootloader，暂时名叫ATBOOT。这个bootloader花了不少时间在wince的引导上，好不容易才跟踪到mmu的打开导致lcd寄存器读写失效。跳到ce时明明已关闭了mmu，不知mmu是怎样影响寄存器的读写，难道是映射错误？看来，要恶补一下才行...

      wince5.0差dm9000的网卡驱动还没好外暂时也没什么好搞了，但是wince的调试真让人头疼，首先编译就得花不少时间，另外，没有Eboot，还不知如何单步调试驱动。这只老虎不好吃，但很有挑战性，i like it。明天，要开始整理Linux的资料了，要是Linux也有一个统一的UI界面，也许会吸引更多的开发者，不过，微软为开发者做的事也太多了，框架，接口，规范...什么都有。

      看来，还需要更多的项目来发现他们各自的优点。 :)

      睡醒时，梦破灭了。依恋美好的梦境，但终需回到现实。

      上班了，不得不学习如何挤公交，下班了，盘算何时才能远离挤压的人群。

      回家后，累了堕了，我的积极哪去呢？

      唯一觉得不错的，是睡的很快、很香，有点难以想象。

      Good Luck Boy! 前路任你闯，just relax...

      不知从什从时候开始，便一直没有休息的工作，直到现在，直到哪一天病倒。说也奇怪，除了肚子痛，好像好久没有遇到感冒、发烧之类的东西 :)

      没记错的话，过完年不到10天就回到学校开始工作，一直都没有回家住上一个晚上，直到昨晚...有时，真的很佩服自己，怎么这么能干 ^_^ 要不是该死的空调管道发出的十分烦躁的噪声，说不定家里的老爸还在唠叨什么时候回去吃个饭:)

      其实，回去挺麻烦的，摇诳、拥挤的旅途不说，还有修这个电脑、买那个东西。就是不能好好休息。连老爸都说是不是又回来修电脑啦...虽然这次真的只想回来吃顿饭，睡个好觉...